Then a new device which is named Inter-line Dynamic Voltage Restorer (IDVR) is discussed. This device consists of two conventional DVRs which are installed. An interline dynamic voltage restorer (IDVR) is a novel c o m p e n s a t i o n piece of mitigation It is made of several dynamic voltage restorers (DVRs) with a. Index Terms—Dynamic voltage restorer, Interline dynamic voltage restorer, Current source inverter, SMES and Power quality.

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Interline dynamic voltage restorer (IDVR) Archives – ASOKA TECHNOLOGIES

An IDVR merely consists of several dynamic voltage ydnamic DVRs sharing a common dc link connecting independent feeders to secure electric power to critical loads. To illustrate the effectiveness of the proposed method an analytical comparison is carried out with the existing phase jump compensation schemes. In this paper, a new configuration has been proposed which not only improves the compensation capacity of the IDVR at high power factors, but also increases the performance of the compensator to mitigate deep sags at fairly moderate power factors.

This paper proposes a new operational mode for the IDVR to improve the DF of different feeders under normal operation.

Abojlala, Khaled Issa and Holliday, Derrick and Xu, Lie Transient analysis of interline dynamic voltage restorer using dynamic phasor representation. To overcome this limitation, a new idea is presented in this paper which allows to reduce the load restrer factor under sag condition, voltqge therefore, the compensation capacity is increased.

Per-phase simulation results for voltage sag condition at: For normal voltage levels, the DVRs should be bypassed. Per-phase PQ sharing mode simulation results: This paper presents a utilization technique for enhancing the capabilities of dynamic voltage restorers DVRs.

Journal of Engineering Research and Technology

Strathprints home Open Access Login. To successfully apply this concept, several constraints are addressed throughout the paper. The overall three-phase voltage signals during in-phase compensation simulation. The proposed technique has the advantage of simplifying the modelling of dynamuc flexible AC transmission system FACTS device in dynamic phasor mode when compared to other modelling techniques reported in the literature. Single line diagram of restorwr IPFC in transmission system.


The main conclusions of this work can be summarized as follows: Then, more of the energy stored in the DC-link capacitor was utilized quickly, reaching its limitation within a shorter period. Electronics Nuclear engineering, Electrical and Electronic Engineering.

The proposed concept has been supported with simulation and experimental results.

The proposed strategy improves the voltage quality of sensitive loads by protecting them against voltge grid voltage sags involving the phase jump.

Instead of bypassing the DVRs in normal conditions, this paper proposes operating the DVRs, if needed, to improve the displacement factor DF of one of the involved feeders. In this mode, theDFof one of the feeders is improved via active and reactive power exchange PQ sharing between feeders through the common dc link.

The performance of proposed method is evaluated using simulation study. Finally, the simulation and practical results on the CHB based IDVR confirmed the effectiveness of the proposed configuration and control scheme.

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The results from both the simulation and experimental tests illustrate that the proposed technique clearly achieved superior performance.

The experimental test results match those proposed using simulation, although some discrepancies due to the imperfect nature of the test circuit components were seen. In this paper an enhanced sag compensation scheme is proposed for capacitor supported DVR. The higher active power requirement associated with voltage phase jump compensation has caused a substantial rise in size and cost of dc link energy storage system of DVR.

Mathematical analysis is carried out for each individual component of the IDVR as modular models, which are then aggregated to generate the final model.

An interline dynamic voltage restorer IDVR is a new device for sag mitigation which is made of several dynamic voltage restorers DVRs with a common DC link, where each DVR is connected in series with a distribution feeder. The ensure compatibility with transient stability programs, the analysis is performed for the fundamental frequency only, with other frequency components being truncated and without considering harmonics. This enhancement can also be seen as a considerable reduction in dc link capacitor size for new installation.


It also increases compensation time by operating in minimum active power mode through a controlled transition once the phase jump is compensated. The overall three-phase voltage signals during zero-real power tracking compensation simulation. A method for building a dynamic phasor model of an Interline Dynamic Voltage Restorer IDVR is presented, and the resulting model is tested in a simple radial distribution system.

Investigating the IDVR performance when the proposed method is applied for a sag with depth of 0. While one of the DVRs compensates for the local voltage sag in its feeder, the other DVRs replenish the common dc-link voltage. In this paper, an enhanced sag compensation strategy is proposed that mitigates the phase jump in the load voltage while improving the overall sag compensation time. Then, experimental results on a scaled-down IDVR are presented xynamic confirm the theoretical and simulation results.

In this technique, the source voltages are sensed continuously and when the voltage sag is detected, the shunt reactances are switched into the circuit and decrease the load power factors to improve IDVR performance.

The DF of the sourcing feeder increases while the DF of the receiving feeder decreases. The existing control strategies either mitigate the phase jump or improve the utilization of dc link energy by i reducing the amplitude interljne injected voltage, or ii optimizing the dc bus energy support. These advantages were achieved by decreasing the load power factor restirer sag condition. This study aims to enhance the abilities of DVRs to maintain acceptable voltages and last longer during compensation.

The experimental results demonstrate the feasibility of the proposed phase jump compensation method for practical applications.